llama.cpp b11716 runs Q1_0 and Q2_0 on Snapdragon Hexagon: HMX/HVX matmul paths, tested on SM8850
llama.cpp b11716 (October 17, 2026) adds Q1_0 and Q2_0 weight support to the Hexagon backend via PR #30122. Native HVX MUL_MAT, Q1_0/Q2_0 on the 2D HMX path, and 128/128 op tests passed on SM8850/v81. Here is what Snapdragon builders need to pull and how to select HTP0.
llama.cpp b11716, published October 17, 2026, is a Hexagon-focused pre-release: it adds Q1_0 and Q2_0 weight support on Snapdragon’s NPU path. If you already run GGUFs on Hexagon with Q4_0-class packs and want the newer 1-bit / 2-bit layouts, this is the build that unlocks them.
Builder question this answers: can stock llama.cpp decode Q1_0 / Q2_0 GGUFs on Hexagon HTP, and what do I need to install?
What PR #30122 adds
The only change called out in the b11716 release notes is PR #30122 (“hexagon: add support for Q1_0 and Q2_0”), co-authored with Qualcomm’s Max Krasnyansky and merged October 17, 2026. From the PR:
- Native Q1_0 and Q2_0
MUL_MATthrough HVX - Direct
{-1,+1}expansion against tiled Q8_0 activations - Workers for 32×1, 32×2, 2D, 4D, and matvec
- Exact host repacking and arbitrary byte-range readback
- Q1_0 and Q2_0 weights enabled on the 2D HMX
MUL_MATpath - Tiling fixes so
MUL_MAT_NXno longer assumes square tiles (Q1/Q2 use non-square tiles)
Verification claimed in the PR: v73, v75, v79, and v81 builds passed; tested on SM8850 / v81 Android; Q1_0 128/128 and Q2_0 128/128 op tests passed. GET_ROWS support is explicitly deferred to a follow-on.
How to get a Hexagon-capable binary
b11716 ships prebuilt Snapdragon archives on the release page:
- Linux arm64 Snapdragon:
llama-b11716-bin-linux-arm64-snapdragon.tar.gz - Android arm64 Snapdragon:
llama-b11716-bin-android-arm64-snapdragon.tar.gz
Official setup is in the Snapdragon backend README: cross-compile with the Qualcomm Snapdragon Toolchain images (ghcr.io/snapdragon-toolchain/arm64-android:v0.7 or arm64-linux:v0.7), or use ./scripts/snapdragon/build.py --target adb|linux …. CMake presets turn on GGML_HEXAGON=ON and GGML_OPENCL=ON.
On device, Hexagon shows up as an HTP “GPU-like” device. The docs’ default pattern is --device HTP0 (or HTP0:0) with -ngl 99. Example from the README:
./scripts/snapdragon/run.py --target adb --devices HTP0 -- \
llama-cli -m Llama-3.2-1B-Instruct-Q4_0.gguf \
-p "what is the most popular cookie in the world?"
Swap in a Q1_0 or Q2_0 GGUF once you have b11716+ Snapdragon binaries. For larger models, the same README documents layer-split across virtual sessions (HTP0:0,HTP0:1,…) and tensor-split across physical NPUs.
What this is not
- It is not Prism ML’s ternary
PQ2_0/PTQ1_0types — those remain outside upstream Hexagon until separately implemented. UpstreamQ2_0is the format this PR targets. - Hexagon support is still labeled experimental in the Snapdragon docs.
- Pre-b11716 Snapdragon builds that already ran Q4_0 do not suddenly gain Q1_0/Q2_0 kernels; pull b11716 or newer.
If you prefer Qualcomm’s higher-level OpenAI-compatible wrapper instead of raw llama.cpp, see our GenieX on Snapdragon note. For the previous day’s CUDA Q2_K/Q3_K decode work, see llama.cpp b11713, and for the Discover Models UI in b11714.
Sources
Source: llama.cpp release b11716